Design, Analysis and Test of Logic Circuits Under Uncertainty (Lecture Notes in Electrical Engineering, nr. 115)
De (autor) Smita Krishnaswamy, Igor L. Markov, John P. Hayesen Limba Engleză Hardback – 21 Sep 2012
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Specificații
ISBN-13: 9789048196432
ISBN-10: 9048196434
Pagini: 136
Dimensiuni: 155 x 235 x 20 mm
Greutate: 0.38 kg
Ediția: 2013
Editura: SPRINGER NETHERLANDS
Colecția Springer
Seria Lecture Notes in Electrical Engineering
Locul publicării: Dordrecht, Netherlands
ISBN-10: 9048196434
Pagini: 136
Dimensiuni: 155 x 235 x 20 mm
Greutate: 0.38 kg
Ediția: 2013
Editura: SPRINGER NETHERLANDS
Colecția Springer
Seria Lecture Notes in Electrical Engineering
Locul publicării: Dordrecht, Netherlands
Public țintă
ResearchTextul de pe ultima copertă
Integrated
circuits
(ICs)
increasingly
exhibit
uncertain
characteristics
due
to
soft
errors,
inherently
probabilistic
devices,
and
manufacturing
variability.
As
device
technologies
scale,
these
effects
can
be
detrimental
to
the
reliability
of
logic
circuits.
To
improve
future
semiconductor
designs,
this
book
describes
methods
for
analyzing,
designing,
and
testing
circuits
subject
to
probabilistic
effects.
The
authors
first
develop
techniques
to
model
inherently
probabilistic
methods
in
logic
circuits
and
to
test
circuits
for
determining
their
reliability
after
they
are
manufactured.
Then,
they study error-masking mechanisms
intrinsic
to
digital
circuits
and
show
how
to
leverage
them
to
design
more
reliable
circuits.
The
book
describes
techniques
for:
• Modeling and reasoning about probabilistic behavior in logic circuits, including a matrix-based reliability-analysis framework;
• Accurate analysis of soft-error rate (SER) based on functional-simulation, sufficiently scalable for use in gate-level optimizations;
• Logic synthesis for greater resilience against soft errors, which improves reliability using moderate overhead in area and performance;
• Test-generation and test-compaction methods aimed at probabilistic faults in logic circuits that facilitate accurate and efficient post-manufacture measurement of soft-error susceptibility.
• Modeling and reasoning about probabilistic behavior in logic circuits, including a matrix-based reliability-analysis framework;
• Accurate analysis of soft-error rate (SER) based on functional-simulation, sufficiently scalable for use in gate-level optimizations;
• Logic synthesis for greater resilience against soft errors, which improves reliability using moderate overhead in area and performance;
• Test-generation and test-compaction methods aimed at probabilistic faults in logic circuits that facilitate accurate and efficient post-manufacture measurement of soft-error susceptibility.
Caracteristici
Presents
a
comprehensive
overview
of
Logic
Circuits
Combines theory with practical examples
Multi-discipline approach to the "hot" topic of uncertainty
Combines theory with practical examples
Multi-discipline approach to the "hot" topic of uncertainty